FIG. 19 is a sectional view illustrating a part of a conventional MMIC including high frequency FETs. In FIG. 19, reference numeral 1 designates a semiconductor substrate having opposite front and rear surfaces. Usually, a GaAs substrate is used for high frequency FETs. Two FETs with a common drain electrode are disposed on the front surface of the substrate 1. More specifically, a common drain electrode 2 comprising AuGe/Ni/Au is disposed on a prescribed part of the front surface of the substrate 1. Two gate electrodes 3 comprising Ti/Al are disposed on the substrate 1 at opposite sides of the drain electrode 2. Two source electrodes 6 comprising AuGe/Ni/Au are disposed on the substrate 1 at opposite sides of the gate electrodes 3. A via-hole 9 penetrates through the substrate 1, and a grounding electrode 10 comprising Ni/Au is disposed over the rear surface of the substrate 1 and the internal surface of the via-hole 9. An electrode 7 comprising Ti/Au or Ti/Al is disposed on the front surface of the substrate 1 opposite the via-hole 9. Hereinafter, this electrode 7 on the via-hole 9 is referred to as upper electrode. A microstrip line 8 comprising Ti/Au connects the source electrode 6 to the upper electrode 7. An active region (not shown) is disposed within the substrate 1 reaching the front surface.
FIGS. 20(a)-20(c) illustrate process steps for fabricating the structure of FIG. 19.
Initially, the source electrodes 6 and the drain electrode 2 are formed on the front surface of the substrate 1 by vapor-deposition and lift-off techniques. Then, the gate electrodes 3 are formed by vapor-deposition and lift-off. After producing passivation films, resistors, inductors, and capacitors (these elements are not shown), the microstrip line 8 is formed by vapor-deposition and lift-off. Thereafter, the upper electrode 7 is formed by vapor-deposition and lift-off, and plating (FIG. 20(a)).
In the step of FIG. 20(b), the rear surface of the substrate 1 is ground to reduce the thickness of the substrate to 100.about.200 .mu.m. Other techniques, such as lapping, polishing, or etching, may be employed in place of grinding. Thereafter, a portion of the substrate 1 directly under the upper electrode 7 is etched away from the rear surface, forming the via-hole 9 penetrating through the substrate.
In the step of FIG. 20(c), Ni/Au is plated over the rear surface of the substrate 1 including the internal surface of the via-hole 9 by electroless plating, followed by electroplating of Au over the rear surface, whereby the grounding electrode 10 is formed in electrical contact with the upper electrode 7.
In the conventional high frequency MMIC, since the substrate 1 is 100.about.200 .mu.m thick, when the substrate 1 comprises GaAs having a thermal conductivity of 46 W/m.K, radiation of heat generated by the FETs is poor, whereby the temperature in a region in the vicinity of the gate electrode is unfavorably increased, adversely affecting the high-frequency characteristics and reliability of the device. If the thickness of the substrate 1 is reduced to about 30 .mu.m to improve the heat radiation, the mechanical strength of the IC chip is reduced, resulting in difficulty in handling the IC chip.
Japanese Published Patent Applications Nos. 61-23350, 63-19877, and 4-311069 disclose a semiconductor device in which a heat generating element is disposed on a semiconductor substrate, and an opening is formed from the rear surface of the substrate opposite the heat generating element and filled with a metal, whereby heat radiation in the vicinity of the heat generating element is improved.
However, when a via-hole for connecting an electrode on the front surface of the substrate to an electrode on the rear surface of the substrate is formed in the substrate including the opening for heat radiation, the via-hole and the opening are usually formed in different etching steps using different etching masks. In this case, the member of process steps is increased and the mask alignment is complicated due to fine wirings, resulting in a reduction in production precision.